The present invention relates generally to CMOS devices and more specifically to a radiation hardened CMOS device and method of fabrication.
Radiation hardened devices require that the structure of the MOS devices be unaffected by radiation bombardment. In MOS devices, the gate oxide is most susceptible to alteration by radiation bombardment. Similarily, the surface of the substrate forming the channel region between the source and drains is susceptible to inversion by radiation bombardment. The process for the formation of CMOS devices generally use polysilicon gates and open tube deposition and diffusion of sources and drains at high temperatures. The high temperatures cause impurities to diffuse from the polysilicon gate into and through the gate oxide and thus reduces the radiation hardness of the thin gate oxide layer under the gate material.
The use of an aluminum gate electrode is well known in the prior art as well as the problems of the interface between the aluminum and silicon substrates. As discussed in U.S. Pat. No. 3,567,509, the interaction between aluminum and silicon can be alleviated by doping the aluminum with a small percentage of silicon. The application of this principle to aluminum gate CMOS devices is illustrated in U.S. Pat. Nos. 3,871,067 and 3,886,583. Although these patents deal specifically with silicon doped aluminum, they do not incorporate the use of the silicon doped aluminum gate as a mask to achieve self-alignment of the source and drain regions. In the later two patents, the silicon doped aluminum is formed and delineated after the formation of the source and drain regions. The formation of the source and drain regions using the silicon doped aluminum as a mask for alignment raises problems in the prior art in that the temperature of the deposition and diffusion must be maintained below the eutectic temperature of silicon-aluminum to minimize and prevent interaction between the silicon doped aluminum gate and the silicon areas.
Thus there exists a need for a method of fabricating radiation hardened CMOS devices having silicon doped aluminum gates using the self-aligned gate techniques.